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是否CPUINFO所有机子都一样?
* O: f0 W& e# s0 Z2 S" C4 C% Chttp://forums.precentral.net/web ... 12.html#post1662530) k3 I/ `1 t( R
+ y6 v& ~1 D4 ]% \root@castle:/proc# cat cpuinfo
1 v5 V7 q; Z0 F. X) _- eProcessor : ARMv7 Processor rev 3 (v7l)
" u1 r& ^$ _3 ?& F Z. RBogoMIPS : 498.07" P7 v4 w+ ~/ f& I! g
Features : swp half thumb fastmult vfp edsp L3 u& @. w8 y' ?
CPU implementer : 0x41$ H" N5 H+ R7 r' D. F
CPU architecture: 7
2 i' y6 r0 D- m n% C8 o$ z X0 S9 kCPU variant : 0x1
0 y; p: A0 ], g( r9 ~ u* i2 s% pCPU part : 0xc08
* n" ~0 P+ g0 X9 E% e1 ZCPU revision : 3
+ x% Q, Q: c! ?. j4 lControl reg : 0xc5387f
$ v1 ]0 O# @7 ? IAux control reg : 0x428 _2 l% t, C8 E! }$ L
L1 instruction cache:7 o( C6 K# c- P) m6 l
features : read-alloc ; ^/ S" K: z/ p, G
size : 16 KB% b* F$ h7 K* A' w/ k; C' ]
assoc : 4& G1 n! d9 v% Q, Y( p5 M/ b
line length : 64$ q, B- H! U. [( _& a
sets : 645 O0 }1 e+ `1 J8 I
L1 data cache:
* }. h3 O7 _$ d6 k. I6 M. z H9 mfeatures : write-through write-back read-alloc % d' ~1 ]0 U- n: P! S6 m9 S
size : 16 KB) f- O& \- W7 @9 R
assoc : 4" I- ]0 L& j7 z# `" U
line length : 64
) X% o( x& D. |" vsets : 64! T3 u- [* }6 a) M6 \6 U
L2 unified cache:, B$ d8 U" }3 d: S, A
features : write-through write-back read-alloc write-alloc
% m$ y/ S5 Y$ y; Wsize : 256 KB; S( n) S9 L+ i V( `- ~
assoc : 8
! _9 s6 C& V: xline length : 645 j! o' r5 m4 z' q
sets : 512+ a, u/ Y z0 z4 G! ^# Z
Cache LoC : 2
( F5 k" e. S0 P" MCache LoU : 15 E1 N* w# Q+ R' Y6 U7 |
( ^0 K3 T# }1 j5 k/ y
Hardware : Sirloin OMAP3430 board- o9 }7 g+ v/ B( o, `% U$ T, H
Revision : 34304332
7 D' k+ [; R" o0 Q9 ?) tSerial : 0000000000000000 |
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